Zanussi CBI750 Specifications

CBI/CGICB BASICS5721-xxxTECHNICAL REFERENCEIntel® Pentium® IIIorIntel® Celeron® PROCESSOR-BASEDSBC

CBI/CGI Technical ReferenceChassis PlansviThis page intentionally left blank.Copyright 2003 by Trenton Technology Inc. All rights reserved.

Power Management Setup CBI/CGI Technical ReferenceChassis Plans.6-4Available options are:Disabled1 through 15, in increments of 1 minutePower Saving T

Power Management SetupCBI/CGI Technical ReferenceChassis Plans. 6-5Suspend Time OutThis option specifies the length of the period of system inactivity

Power Management Setup CBI/CGI Technical ReferenceChassis Plans.6-6Available options are:IgnoreMonitorDevice 0 through Device 8 MonitoringThese option

PCI/Plug and Play SetupCBI/CGI Technical ReferenceChassis Plans. 7-1Chapter 7 PCI/Plug and Play SetupPCI/PLUG AND PLAY SETUPWhen you select PC

PCI/Plug and Play Setup CBI/CGI Technical ReferenceChassis Plans.7-2On Board LAN (not available on BASIC models)The Setup screen displays the system

PCI/Plug and Play SetupCBI/CGI Technical ReferenceChassis Plans. 7-3Available options are:NoYesPCI Latency Timer (PCI Clocks)This option specifies the

PCI/Plug and Play Setup CBI/CGI Technical ReferenceChassis Plans.7-4The Setup screen displays the system option:PCI IDE BusMaster DisabledAvailable op

PCI/Plug and Play SetupCBI/CGI Technical ReferenceChassis Plans. 7-5Available options are:DisabledINTAINTBINTCINTDHardwiredDMA Channels 0, 1, 3, 5, 6

PCI/Plug and Play Setup CBI/CGI Technical ReferenceChassis Plans.7-6Reserved Memory SizeThis option specifies the size of the memory area reserved for

Peripheral SetupCBI/CGI Technical ReferenceChassis Plans 8-1Chapter 8 Peripheral SetupPERIPHERAL SETUPWhen you select Peripheral Setup from th

SpecificationsCBI/CGI Technical ReferenceChassis Plans 1-1Chapter 1 SpecificationsINTRODUCTION The CBI full-featured PCI/ISA processors are si

Peripheral Setup CBI/CGI Technical ReferenceChassis Plans8-2OnBoard FDCThe on-board floppy drive controller may be enabled or disabled using this opti

Peripheral SetupCBI/CGI Technical ReferenceChassis Plans 8-3For example, if there is one off-board serial port on the ISA Bus and its address is set t

Peripheral Setup CBI/CGI Technical ReferenceChassis Plans8-4• ECP allows the parallel port to be used with devices which adhere to the Extended Capabi

Peripheral SetupCBI/CGI Technical ReferenceChassis Plans 8-5OnBoard IDE This option specifies the on-board integrated drive electronics (IDE) controll

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CBI/CGI Technical ReferenceChassis Plans A-1Appendix A BIOS MessagesBIOS BEEP CODES Errors may occur during the POST (Power-On Self Test) routine

CBI/CGI Technical ReferenceChassis PlansA-2BIOS BEEP CODES (CONTINUED)BIOS ERROR MESSAGESIf a non-fatal error occurs during the POST routines performe

CBI/CGI Technical ReferenceChassis Plans A-3BIOS ERROR MESSAGES (CONTINUED)Message DescriptionCH-2 Timer Error Most AT standard system boards include

CBI/CGI Technical ReferenceChassis PlansA-4BIOS ERROR MESSAGES (CONTINUED)Message DescriptionHDD Controller Failure The BIOS is not able to communicat

CBI/CGI Technical ReferenceChassis Plans A-5ISA BIOS NMI HANDLER MESSAGESMessage DescriptionMemory Parity Error Memory failed. The message appears as

Specifications CBI/CGI Technical ReferenceChassis Plans1-2MODELS (CONTINUED)Model #Model Name SpeedCBI - BX: (continued)Intel® Celeron® Processor - 66

CBI/CGI Technical ReferenceChassis PlansA-6PORT 80 CODES The following codes are presented on Port 80H as the BIOS performs its reset procedure.Code D

CBI/CGI Technical ReferenceChassis Plans A-7PORT 80 CODES (CONTINUED) Code DescriptionFCFDFFErasing flash ROM next.Programming flash ROM next.Flash RO

CBI/CGI Technical ReferenceChassis PlansA-8PORT 80 CODES (CONTINUED) Code Description242527282A2B2C2D2E2F303132343738393A3B404243Configuration require

CBI/CGI Technical ReferenceChassis Plans A-9PORT 80 CODES (CONTINUED) Code Description4445464748494B4C4D4E4F5051525354575859interrupts enabled (if dia

CBI/CGI Technical ReferenceChassis PlansA-10PORT 80 CODES (CONTINUED) Code Description60626566677F808182838485868788898B8C8D8F9195DMA page register te

CBI/CGI Technical ReferenceChassis Plans A-11PORT 80 CODES (CONTINUED) Code Description969798999A9B9C9D9EA2A3A4A5A7A8A9AAABB0B100Initializing before p

CBI/CGI Technical ReferenceChassis PlansA-12PORT 80 CODES (CONTINUED)The System BIOS passes control to the different buses at the following checkpoint

CBI/CGI Technical ReferenceChassis Plans B-1Appendix B Adaptec, Inc. Software LicenseCAREFULLY READ THE FOLLOWING TERMS AND CONDITIONS. BY USING

CBI/CGI Technical ReferenceChassis PlansB-27. EXPORT: By using this Software, you acknowledge that the laws and regulations of the United States res

CBI/CGI Technical ReferenceChassis Plans C-1Appendix C SCSISelect Configuration UtilityINTRODUCTION This appendix provides operating instructions

SpecificationsCBI/CGI Technical ReferenceChassis Plans 1-3MODELS (CONTINUED)where xM indicates memory size (0M = 0MB memory,8M =8MB memory, etc.)FEAT

CBI/CGI Technical ReferenceChassis PlansC-2If you have made changes to the adapter settings, the following message displays:If you do not want to sa

CBI/CGI Technical ReferenceChassis Plans C-3OPTIONS MENU When you invoke the SCSISelect Configuration Utility, a screen similar to the following displ

CBI/CGI Technical ReferenceChassis PlansC-4CONFIGURE/VIEW HOST ADAPTER SETTINGSThe Configure/View Host Adapter option displays the current settings fo

CBI/CGI Technical ReferenceChassis Plans C-5priority and SCSI ID 0 has the lowest priority. For 16-bit devices, the priority of IDs is 7 through 0, t

CBI/CGI Technical ReferenceChassis PlansC-616-bit Adapter Termination SettingsDescription TerminationAdapter is at end of SCSI bus; bus has only 8-bit

CBI/CGI Technical ReferenceChassis Plans C-7BOOT DEVICE OPTIONSThe Boot Device Configuration screen displays the current settings for the boot device

CBI/CGI Technical ReferenceChassis PlansC-8SCSI DEVICE CONFIGURATIONThe SCSI Device Configuration screen displays the current settings for each SCSI I

CBI/CGI Technical ReferenceChassis Plans C-9The Initiate Sync Negotiation setting determines whether the adapter initiates synchronous negotiation wit

CBI/CGI Technical ReferenceChassis PlansC-10adapter to perform other operations on the SCSI bus while the SCSI device is tempo-rarily disconnected.Whe

CBI/CGI Technical ReferenceChassis Plans C-11Available options are:YesNoInclude in BIOS ScanThis option indicates whether or not the specified SCSI de

Specifications CBI/CGI Technical ReferenceChassis Plans1-4FEATURES (CONTINUED)• Intel Accelerated Graphics Port (AGP) VGA on-board video interface• PC

CBI/CGI Technical ReferenceChassis PlansC-12ADVANCED CONFIGURATION OPTIONSWhen you select Advanced Configuration Options from the Configure/View Host

CBI/CGI Technical ReferenceChassis Plans C-13Reset SCSI Bus at IC InitializationThe default for this option is Enabled. When the Plug and Play Scam S

CBI/CGI Technical ReferenceChassis PlansC-14Available options are:• Boot Only - Only the removable-media drive designated as the boot device is treate

CBI/CGI Technical ReferenceChassis Plans C-15Available options are:EnabledDisabledBIOS Support for Bootable CD-ROMTo boot from a CD-ROM, this option m

CBI/CGI Technical ReferenceChassis PlansC-16SCSI DISK UTILITIESThe SCSI Disk Utilities screen allows you to format or verify a device on the SCSI bus.

CBI/CGI Technical ReferenceChassis Plans C-17SCSI drives are preformatted and need not be formatted again. If a drive is not prefor-matted, you can u

CBI/CGI Technical ReferenceChassis PlansC-18Two options are available:• Select Yes to continue with the verify procedure and reassign bad blocks.If y

Declaration of ConformityAPPLICATION OF COUNCIL DIRECTIVE(S)89/336/EECStandard(s) to which Conformity is Declared:EN55022: 1994/A2:1997, CLASS AEN5008

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SpecificationsCBI/CGI Technical ReferenceChassis Plans 1-5SBC BLOCK DIAGRAM

Specifications CBI/CGI Technical ReferenceChassis Plans1-6SBC PROCESSOR BOARD LAYOUT

SpecificationsCBI/CGI Technical ReferenceChassis Plans 1-7PROCESSORS • Intel® Pentium® III (FC-PGA) microprocessor• 1.0GHz, 900MHz, 850MHz, 800MHz, 75

Specifications CBI/CGI Technical ReferenceChassis Plans1-8(L1) instruction cache and 16K L1 data cache. These cache arrays run at the full speed of t

SpecificationsCBI/CGI Technical ReferenceChassis Plans 1-9Specification, the PC Registered DIMM Specification and the PC Serial Presence Detect Specif

Specifications CBI/CGI Technical ReferenceChassis Plans1-10The LM80 also monitors an external chassis intrusion switch via the system hardware monitor

SpecificationsCBI/CGI Technical ReferenceChassis Plans 1-11PCI ENHANCED IDE ULTRA DMA/33 INTERFACE (DUAL)Dual high performance PCI Bus Master EIDE in

Specifications CBI/CGI Technical ReferenceChassis Plans1-12BATTERY A built-in lithium battery is provided, for ten years of data retention for CMOS me

SpecificationsCBI/CGI Technical ReferenceChassis Plans 1-13CONFIGURATION JUMPERSThe setup of the configuration jumpers on the SBC is described below.

Specifications CBI/CGI Technical ReferenceChassis Plans1-14CONFIGURATION JUMPERS (CONTINUED)JumperDescription JU13 SCSI Termination Enable (not availa

SpecificationsCBI/CGI Technical ReferenceChassis Plans 1-15ETHERNET LEDS AND CONNECTOR (NOT AVAILABLE ON BASIC MODELS)The Ethernet interface has two L

Specifications CBI/CGI Technical ReferenceChassis Plans1-16CONNECTORS ______________________________________________________________________NOTE: Pin

SpecificationsCBI/CGI Technical ReferenceChassis Plans 1-17CONNECTORS (CONTINUED)P4A - Keyboard Header5 pin single row header, Amp #640456-5Pin12345Si

Specifications CBI/CGI Technical ReferenceChassis Plans1-18CONNECTORS (CONTINUED)P7 - Serial Port 2 Connector (continued)Pin79SignalData Terminal Read

SpecificationsCBI/CGI Technical ReferenceChassis Plans 1-19CONNECTORS (CONTINUED)P10 - External Reset Connector2 pin header, Amp #640456-2Pin12SignalN

WARRANTY The product is warranted against material and manufacturing defects for two years from date of delivery. Buyer agrees that if this product p

Specifications CBI/CGI Technical ReferenceChassis Plans1-20CONNECTORS (CONTINUED)P11A - Primary IDE Hard Drive Connector (continued)Pin293133353739Sig

SpecificationsCBI/CGI Technical ReferenceChassis Plans 1-21CONNECTORS (CONTINUED)P13 - PCI Ultra Wide SCSI Controller Connector (continued)Pin23242526

Specifications CBI/CGI Technical ReferenceChassis Plans1-22CONNECTORS (CONTINUED)Copyright 2003 by Trenton Technology Inc. All rights reserved. P17 -

ISA/PCI ReferenceCBI/CGI Technical ReferenceChassis Plans 2-1Chapter 2 ISA/PCI ReferenceISA BUS PIN NUMBERING 62-pin ISA Bus C

ISA/PCI Reference CBI/CGI Technical ReferenceChassis Plans2-2ISA BUS PIN ASSIGNMENTSThe following tables summarize pin assignments for the Industry St

ISA/PCI ReferenceCBI/CGI Technical ReferenceChassis Plans 2-3ISA BUS SIGNAL DESCRIPTIONSThe following is a description of the ISA Bus signals. All si

ISA/PCI Reference CBI/CGI Technical ReferenceChassis Plans2-4IO16# (I)I/O 16-bit Chip Select (IO16#) signals the system board that the present data t

ISA/PCI ReferenceCBI/CGI Technical ReferenceChassis Plans 2-5NOWS# (I)The No Wait State (NOWS#) signal tells the microprocessor that it can complete

ISA/PCI Reference CBI/CGI Technical ReferenceChassis Plans2-6T-C (O)Terminal Count (T-C) provides a pulse when the terminal count for any DMA channel

ISA/PCI ReferenceCBI/CGI Technical ReferenceChassis Plans 2-7I/O ADDRESS MAP*INTERRUPT ASSIGNMENTS** These are typical parameters, which may not refle

TRADEMARKS IBM, PC, VGA, EGA, OS/2 and PS/2 are trademarks or registered trademarks ofInternational Business Machines Corp.AMI and AMIBIOS are tradema

ISA/PCI Reference CBI/CGI Technical ReferenceChassis Plans2-8PCI LOCAL BUS OVERVIEWThe PCI (Peripheral Component Interconnect) Local Bus is a high per

ISA/PCI ReferenceCBI/CGI Technical ReferenceChassis Plans 2-9PCI LOCAL BUS SIGNAL DEFINITIONThe PCI interface requires a minimum of 47 pins for a targ

ISA/PCI Reference CBI/CGI Technical ReferenceChassis Plans2-10PCI LOCAL BUS PIN NUMBERINGComponent Sideof Board5-volt/32-bit PCI Connector

ISA/PCI ReferenceCBI/CGI Technical ReferenceChassis Plans 2-11PCI LOCAL BUS PIN ASSIGNMENTSThe PCI Local Bus pin assignments shown below are for the P

ISA/PCI Reference CBI/CGI Technical ReferenceChassis Plans2-12PCI LOCAL BUS PIN ASSIGNMENTS (CONTINUED)I/O Pin Signal Name I/O Pin Signal NameB36B37B3

ISA/PCI ReferenceCBI/CGI Technical ReferenceChassis Plans 2-13PCI LOCAL BUS PIN ASSIGNMENTS (CONTINUED)The following pin assignments apply only to bac

ISA/PCI Reference CBI/CGI Technical ReferenceChassis Plans2-14PCI LOCAL BUS SIGNAL DESCRIPTIONSThe PCI Local Bus signals are described below and may b

ISA/PCI ReferenceCBI/CGI Technical ReferenceChassis Plans 2-15C/BE[7::4]# (optional)Bus Command and Byte Enables are multiplexed on the same pins. D

ISA/PCI Reference CBI/CGI Technical ReferenceChassis Plans2-16PARParity is even parity across AD[31::00] and C/BE[3::0]#. Parity generation is requir

ISA/PCI ReferenceCBI/CGI Technical ReferenceChassis Plans 2-17STOP#Stop indicates that the current target is requesting the master to stop the current

CBI/CGI Technical ReferenceChassis Plans i Table of ContentsSpecifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ISA/PCI Reference CBI/CGI Technical ReferenceChassis Plans2-18PICMG EDGE CONNECTOR PIN ASSIGNMENTSThe pin assignments shown below are for the PICMG po

ISA/PCI ReferenceCBI/CGI Technical ReferenceChassis Plans 2-19PICMG EDGE CONNECTOR PIN ASSIGNMENTS (CONTINUED)I/O Pin Signal Name I/O Pin Signal NameB

ISA/PCI Reference CBI/CGI Technical ReferenceChassis Plans2-20PICMG EDGE CONNECTOR PIN ASSIGNMENTS (CONTINUED)The following pin assignments apply only

System BIOSCBI/CGI Technical ReferenceChassis Plans 3-1Chapter 3 System BIOSBIOS OPERATION Sections 3 through 8 of this manual describe the op

System BIOS CBI/CGI Technical ReferenceChassis Plans3-2the validity of the system setup information stored in the system CMOS RAM. (See Running AMIBI

System BIOSCBI/CGI Technical ReferenceChassis Plans 3-3Password EntryThe system may be configured so that the user is required to enter a password eac

System BIOS CBI/CGI Technical ReferenceChassis Plans3-4You may try again to enter the correct password. If you enter the password incorrectly three t

System BIOSCBI/CGI Technical ReferenceChassis Plans 3-5RUNNING AMIBIOS SETUPAMIBIOS Setup keeps a record of system parameters, such as date and time,

System BIOS CBI/CGI Technical ReferenceChassis Plans3-6AMIBIOS SETUP UTILITY MAIN MENUWhen you press <F1> in response to an error message receiv

System BIOSCBI/CGI Technical ReferenceChassis Plans 3-7• Primary Master and Slave Disk Types• Secondary Master and Slave Disk Types• Logical Block Add

CBI/CGI Technical ReferenceChassis Plansii Table of ContentsSpecifications (continued)Temperature/Environment . . . . . . . . . . . . . . . . . .

System BIOS CBI/CGI Technical ReferenceChassis Plans3-8• Select Advanced Chipset Setup to make changes to Advanced Chipset Setup parameters as describ

System BIOSCBI/CGI Technical ReferenceChassis Plans 3-9• Power Button Function• Green PC Monitor Power State• Video Power Down Mode• Hard Disk Power D

System BIOS CBI/CGI Technical ReferenceChassis Plans3-10• OnBoard Parallel Port• Parallel Port Mode• EPP Version• Parallel Port IRQ• Parallel Port DMA

System BIOSCBI/CGI Technical ReferenceChassis Plans 3-11AUTO-DETECT HARD DISKSThe Auto-Detect Hard Disks option allows you to have AMIBIOS automatical

System BIOS CBI/CGI Technical ReferenceChassis Plans3-12This is the message which displays before you have established a password or if the last passw

System BIOSCBI/CGI Technical ReferenceChassis Plans 3-13The Change User Password option is similar in functionality to the Change Supervisor Password

System BIOS CBI/CGI Technical ReferenceChassis Plans3-14Auto Configuration with Fail Safe SettingsThis option allows you to load the Fail Safe default

System BIOSCBI/CGI Technical ReferenceChassis Plans 3-15KEY CONVENTIONS Listed below is an explanation of the keys you may use for navigation and sele

System BIOS CBI/CGI Technical ReferenceChassis Plans3-16This page intentionally left blank.Copyright 2003 by Trenton Technology Inc. All rights reser

Standard CMOS SetupCBI/CGI Technical ReferenceChassis Plans 4-1Chapter 4 Standard CMOS SetupSTANDARD CMOS SETUPWhen you select Standard CMOS S

CBI/CGI Technical ReferenceChassis Plans iii Table of ContentsSystem BIOS (continued)Save Settings and Exit . . . . . . . . . . . . . . . . . . .

Standard CMOS Setup CBI/CGI Technical ReferenceChassis Plans4-2The Help window displays allowable settings:Month : Jan - DecDay : 01 - 31Year

Standard CMOS SetupCBI/CGI Technical ReferenceChassis Plans 4-3through 1F7H, 3F6H and IRQ14. The secondary controller uses I/O port addresses 170H th

Standard CMOS Setup CBI/CGI Technical ReferenceChassis Plans4-4• Set the drive type to Auto to have AMIBIOS detect the drive type and parameters autom

Standard CMOS SetupCBI/CGI Technical ReferenceChassis Plans 4-5sector size by boosting the write current for sectors on inner tracks. This parameter

Standard CMOS Setup CBI/CGI Technical ReferenceChassis Plans4-6Available options are:OffOnProgrammed I/O (PIO) ModeIDE PIO mode programs timing cycles

Standard CMOS SetupCBI/CGI Technical ReferenceChassis Plans 4-7Select ‘Y’ or ‘N’ as appropriate. You may have to select ‘N’ several times to prevent

Standard CMOS Setup CBI/CGI Technical ReferenceChassis Plans4-8This page intentionally left blank.Copyright 2003 by Trenton Technology Inc. All right

Advanced SetupCBI/CGI Technical ReferenceChassis Plans 5-1Chapter 5 Advanced SetupADVANCED CMOS SETUPWhen you select Advanced CMOS Setup from

Advanced Setup CBI/CGI Technical ReferenceChassis Plans5-2ADVANCED CMOS SETUP OPTIONSThe descriptions for the system options listed below show the val

Advanced SetupCBI/CGI Technical ReferenceChassis Plans 5-3Available options are:AutoFloppyHard Disk1st Boot DeviceThis option specifies the device typ

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Advanced Setup CBI/CGI Technical ReferenceChassis Plans5-4The Setup screen displays the system option:Try Other Boot Devices YesAvailable options are:

Advanced SetupCBI/CGI Technical ReferenceChassis Plans 5-5Hard Disk Access ControlThis option specifies the read/write access which is set when bootin

Advanced Setup CBI/CGI Technical ReferenceChassis Plans5-6The Setup screen displays the system option:PS/2 Mouse Support EnabledAvailable options are:

Advanced SetupCBI/CGI Technical ReferenceChassis Plans 5-7Two options are available:• Select Setup to have the password prompt appear only when an att

Advanced Setup CBI/CGI Technical ReferenceChassis Plans5-8Three options are available:• Select Disabled to disable both L1 internal cache memory on th

Advanced SetupCBI/CGI Technical ReferenceChassis Plans 5-9accessed more rapidly than ROM and the data bus is wider to RAM. The default setting for th

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Advanced SetupCBI/CGI Technical ReferenceChassis Plans 5-11ADVANCED CHIPSET SETUPWhen you select Advanced Chipset Setup from the AMIBIOS Setup Main Me

Advanced Setup CBI/CGI Technical ReferenceChassis Plans5-12ADVANCED CHIPSET SETUP OPTIONSThe descriptions for the system options listed below show the

Advanced SetupCBI/CGI Technical ReferenceChassis Plans 5-13Available options are:DisabledEnabledSERR#This option enables the System Error (SERR#) sign

CBI/CGI Technical ReferenceChassis Plans vHANDLING PRECAUTIONS_______________________________________________________________________WAR NI NG : This

Advanced Setup CBI/CGI Technical ReferenceChassis Plans5-14The Setup screen displays the system option:BX Master Latency Timer (Clks) 64Available opti

Advanced SetupCBI/CGI Technical ReferenceChassis Plans 5-15Three options are available:• None - No error checking or error reporting is done.• EC - Mu

Advanced Setup CBI/CGI Technical ReferenceChassis Plans5-16Graphics Aperture Size (not available on BASIC models)This option specifies the amount of

Advanced SetupCBI/CGI Technical ReferenceChassis Plans 5-17The Setup screen displays the system option:AGP SERR EnabledAvailable options are:DisabledE

Advanced Setup CBI/CGI Technical ReferenceChassis Plans5-18Available options are:Disabled3 Sysclk1 Sysclk2 Sysclk4 SysclkPIIX4 SERR#This option enable

Advanced SetupCBI/CGI Technical ReferenceChassis Plans 5-19The Setup screen displays the system option:PIIX4 Delayed Transaction EnabledAvailable opti

Advanced Setup CBI/CGI Technical ReferenceChassis Plans5-20This page intentionally left blank.Copyright 2003 by Trenton Technology Inc. All rights re

Power Management SetupCBI/CGI Technical ReferenceChassis Plans. 6-1Chapter 6 Power Management SetupPOWER MANAGEMENT SETUPWhen you select Power

Power Management Setup CBI/CGI Technical ReferenceChassis Plans.6-2The Setup screen displays the system option:ACPI Aware O/S NoAvailable options are:

Power Management SetupCBI/CGI Technical ReferenceChassis Plans. 6-3Available options are:Stand BySuspendOffVideo Power Down ModeIf the video subsystem